The Renesas Electronics zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. It is driven by a differential SRC output pair from an IDT main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without spread-spectrum clocking.
SMBus Interface
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
9DB633AGILF Clock Buffer 28-Pin TSSOP
Manufacturer:
Renesas Electronics
Manufacturer Part No:
9DB633AGILF
Enrgtech Part No:
ET13497773
Warranty:
Manufacturer
£ 3.60
Checking for live stock
Number of Elements per Chip:
5
Maximum Supply Current:
200 μA
Maximum Input Frequency:
110MHz
Mounting Type:
Surface Mount
Package Type:
TSSOP
Pin Count:
28
