8M-bit 2.5V/3.0V Serial Flash Memory with uniform 4KB sectors and Dual/Quad SPI. SPI with Single, Dual, Quad I/O<BR/>UID & OTP Feature<BR/>2.3V to 3.6V Vcc Range<BR/>Volatile & Non-Volatile SR<BR/>Erase/Program Suspend & Resume

Density : 2Gbit (Single chip solution)<BR/>Vcc : 2.7V to 3.6V<BR/>Bus width : x8<BR/>Operating temperature<BR/>Industrial: -40°C to 85°C<BR/>Single-Level Cell (SLC) technology.<BR/>Organization<BR/>Density: 2G-bit/256M-byte<BR/>Page size<BR/>2,112 bytes (2048 + 64 bytes)<BR/>Block size<BR/>64 pages (128K + 4K bytes)<BR/>Highest Performance<BR/>Read performance (Max.)<BR/>Random read: 25us<BR/>Sequential read cycle: 25ns<BR/>Write Erase performance<BR/>Page program time: 250us(typ.)<BR/>Block erase time: 2ms(typ.)<BR/>Endurance 100,000 Erase/Program Cycles(2)<BR/>10-years data retention<BR/>Command set<BR/>Standard NAND command set<BR/>Additional command support<BR/>Sequential Cache Read<BR/>Random Cache Read<BR/>Cache Program<BR/>Copy Back<BR/>Two-plane operation<BR/>Contact Winbond for OTP feature<BR/>Contact Winbond for block Lock feature<BR/>Lowest power consumption<BR/>Read: 25mA(typ.3V)<BR/>Program/Erase: 25mA(typ.3V)<BR/>CMOS standby: 10uA(typ.)<BR/>Space Efficient Packaging<BR/>48-pin standard TSOP1<BR/>63-ball VFBGA 2Gb SLC NAND Flash Memory with uniform 2KB+64B page size. Bus Width: x8<BR/>Random Read: 25us<BR/>Page Program Time: 250us(typ.)<BR/>Block Erase Time: 2ms(typ.)<BR/>Support OTP Memory Area

1Gb Serial NAND Flash Memory with uniform 2KB+64B page size and set Buffer Read Mode as default. Page Read Time with ECC Enable: 50us<BR/>Page Program Time: 250us(typ.)<BR/>Block Erase Time: 2ms(typ.)<BR/>Support OTP Memory Area

Density : 2Gbit (Single chip solution)<BR/>Vcc : 2.7V to 3.6V<BR/>Bus width : x8<BR/>Operating temperature<BR/>Industrial: -40°C to 85°C<BR/>Single-Level Cell (SLC) technology.<BR/>Organization<BR/>Density: 2G-bit/256M-byte<BR/>Page size<BR/>2,112 bytes (2048 + 64 bytes)<BR/>Block size<BR/>64 pages (128K + 4K bytes)<BR/>Highest Performance<BR/>Read performance (Max.)<BR/>Random read: 25us<BR/>Sequential read cycle: 25ns<BR/>Write Erase performance<BR/>Page program time: 250us(typ.)<BR/>Block erase time: 2ms(typ.)<BR/>Endurance 100,000 Erase/Program Cycles(2)<BR/>10-years data retention<BR/>Command set<BR/>Standard NAND command set<BR/>Additional command support<BR/>Sequential Cache Read<BR/>Random Cache Read<BR/>Cache Program<BR/>Copy Back<BR/>Two-plane operation<BR/>Contact Winbond for OTP feature<BR/>Contact Winbond for block Lock feature<BR/>Lowest power consumption<BR/>Read: 25mA(typ.3V)<BR/>Program/Erase: 25mA(typ.3V)<BR/>CMOS standby: 10uA(typ.)<BR/>Space Efficient Packaging<BR/>48-pin standard TSOP1<BR/>63-ball VFBGA 2Gb SLC NAND Flash Memory with uniform 2KB+64B page size. Bus Width: x8<BR/>Random Read: 25us<BR/>Page Program Time: 250us(typ.)<BR/>Block Erase Time: 2ms(typ.)<BR/>Support OTP Memory Area

128M-bit Serial Flash Memory with uniform 4KB sectors and Dual/Quad SPI. 4 I/O Fixed<BR/>UID & OTP Feature<BR/>Volatile & Non-Volatile SR<BR/>Individual Block/Sector Write Protection<BR/>Programmable Output Driver Strength

8M-bit 3.0V Serial Flash Memory with uniform 4KB sectors and Dual/Quad SPI. SPI with Single, Dual, Quad I/O<BR/>UID & OTP Feature<BR/>Volatile & Non-Volatile SR<BR/>Erase/Program Suspend & Resume<BR/>Software and Hardware Write-Protect

The W972GG6KB is a 2G bits DDR2 SDRAM, and speed involving -18, -25/25I, and -3/-3I. Double Data Rate architecture: two data transfers per clock cycle<BR/>CAS Latency: 3, 4, 5, 6 and 7<BR/>Burst Length: 4 and 8<BR/>Bi-directional, differential data strobes (DQS and /DQS ) are transmitted / received with data<BR/>Edge-aligned with Read data and center-aligned with Write data<BR/>DLL aligns DQ and DQS transitions with clock<BR/>Differential clock inputs (CLK and /CLK)<BR/>Data masks (DM) for write data<BR/>Commands entered on each positive CLK edge, data and data mask are referenced to both edges of /DQS<BR/>Posted /CAS programmable additive latency supported to make command and data bus efficiency<BR/>Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)<BR/>Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality<BR/>Auto-precharge operation for read and write bursts<BR/>Auto Refresh and Self Refresh modes<BR/>Precharged Power Down and Active Power Down<BR/>Write Data Mask<BR/>Write Latency = Read Latency - 1 (WL = RL - 1)<BR/>Interface: SSTL_18

Density : 4Gbit (Single chip solution)<BR/>Vcc : 2.7V to 3.6V<BR/>Bus width : x8<BR/>Operating temperature<BR/>Industrial: -40°C to 85°C<BR/>Single-Level Cell (SLC) technology.<BR/>Organization<BR/>Density: 4G-bit/512M-byte<BR/>Page size<BR/>2,112 bytes (2048 + 64 bytes)<BR/>Block size<BR/>64 pages (128K + 4K bytes)<BR/>Highest Performance<BR/>Read performance (Max.)<BR/>Random read: 25us<BR/>Sequential read cycle: 25ns<BR/>Write Erase performance<BR/>Page program time: 250us(typ.)<BR/>Block erase time: 2ms(typ.)<BR/>Endurance 100,000 Erase/Program Cycles(1)<BR/>10-years data retention<BR/>Command set<BR/>Standard NAND command set<BR/>Additional command support<BR/>Sequential Cache Read<BR/>Random Cache Read<BR/>Cache Program<BR/>Copy Back<BR/>Two-plane operation<BR/>Contact Winbond for OTP feature<BR/>Contact Winbond for Block Lock feature<BR/>Lowest power consumption<BR/>Read: 25mA(typ.)<BR/>Program/Erase: 25mA(typ.)<BR/>CMOS standby: 10uA(typ.)<BR/>Space Efficient Packaging<BR/>48-pin standard TSOP1<BR/>63-ball VFBGA 4Gb SLC NAND Flash Memory with uniform 2KB+64B page size. Bus Width: x8<BR/>Random Read: 25us<BR/>Page Program Time: 250us(typ.)<BR/>Block Erase Time: 2ms(typ.)<BR/>Support OTP Memory Area

2Gb SLC NAND Flash Memory with uniform 2KB+64B page size. Bus Width: x8<BR/>Random Read: 25us<BR/>Page Program Time: 250us(typ.)<BR/>Block Erase Time: 2ms(typ.)<BR/>Support OTP Memory Area

4Gb SLC NAND Flash Memory with uniform 2KB+64B page size. Bus Width: x8<BR/>Random Read: 25us<BR/>Page Program Time: 250us(typ.)<BR/>Block Erase Time: 2ms(typ.)<BR/>Support OTP Memory Area

Density : 2Gbit (Single chip solution)<BR/>Vcc : 1.7V to 1.95V<BR/>Bus width : x8 x16<BR/>Operating temperature<BR/>Industrial: -40°C to 85°C<BR/>Industrial Plus: -40°C to 105°C<BR/>Single-Level Cell (SLC) technology.<BR/>Organization<BR/>Density: 2G-bit/256M-byte<BR/>Page size<BR/>2,112 bytes (2048 + 64 bytes)<BR/>1,056 words (1024 + 32 words)<BR/>Block size<BR/>64 pages (128K + 4K bytes)<BR/>64 pages (64K + 2K words)<BR/>Highest Performance<BR/>Read performance (Max.)<BR/>Random read: 25us<BR/>Sequential read cycle: 25ns<BR/>Write Erase performance<BR/>Page program time: 250us(typ.)<BR/>Block erase time: 2ms(typ.)<BR/>Endurance 100,000 Erase/Program Cycles(1)<BR/>10-years data retention<BR/>Command set<BR/>Standard NAND command<BR/>Additional command support<BR/>Copy Back<BR/>Two-plane operation<BR/>Contact Winbond for OTP f<BR/>Contact Winbond for Block<BR/>Lowest power consumption<BR/>Read: 13mA(typ.)<BR/>Program/Erase: 10mA(typ.)<BR/>CMOS standby: 10uA(typ.)<BR/>Space Efficient Packaging<BR/>48-pin standard TSOP1<BR/>63-ball VFBGA 2Gb SLC NAND Flash Memory with uniform 2KB+64B page size. Bus Width: x8<BR/>Random Read: 25us<BR/>Page Program Time: 250us(typ.)<BR/>Block Erase Time: 2ms(typ.)<BR/>Support OTP Memory Area

64M-bit Serial Flash Memory with uniform 4KB sectors and Dual/Quad SPI. 4 I/O Fixed<BR/>UID & OTP Feature<BR/>Volatile & Non-Volatile SR<BR/>Programmable Output Driver Strength<BR/>Individual Block/Sector Write Protection