The Texas Instruments Deserializer device converts a high speed serialized interface with an embedded clock, delivered over a single signal pair to four LVDS data or control streams, one LVDS clock pair and I2S audio data. Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signalling. DC balanced and scrambled data with
Embedded clock
Adaptive cable equalization
Internal pattern generation
Backward compatible modes